User Case Study:
Syrup Spices Up Electric Circuits

With four power modules installed, adding resistance to the neutral line caused the modules to latch-up. Though this behavior was not a problem because the amount of resistance required inducing latch-up far exceeded the value that would occur in practice, it required an explanation and an assurance that it would not occur under more realistic conditions.

After some investigation, they found that if a resistance is added to the neutral line of a modular three phase power system, the circuit will trip when configured as "3n+1", that is, with 4, 7 or 10 modules.

This was the result of careful analytical work using Maple, (from Maplesoft, Waterloo, Canada) which could not be obtained using traditional numerical computation methods. With a number-crunching package, the user has to specify each and every bit of a problem, but if he can do it analytically all he needs is to enter the equations and solve them. The process is neater and easier.

To better understand the cause of the latch-up we attempted to simulate the power system using SPICE, a numerical circuit simulation tool," explains NCR's Joe Riel. "Modeling the system, however, proved to be difficult and ultimately unsuccessful. We then turned to Maple.

The power system consists of single-phase power modules connected between the lines and neutral of the three-phase source. The total number of modules in a system depends on the load of the system. Because the number is not necessarily a multiple of three, the line currents are, in general, unbalanced. The outputs of all the modules are paralleled. Power sharing control lines ensure that all modules draw the same power.

The modules have power factor correction, thus their input looks resistive at the line frequency. Because they supply a fixed load their average input power draw is constant. As the rms (root mean square) line voltage increases the rms line current decreases.

However, because the load is constant power, the effective resistance must be adjusted so that the input power drawn from the AC mains is constant. Over a number of cycles a difference between the load power (output) and the drawn power (input) can be made up or stored in internal capacitors. But the circuitry must eventually compensate by adjusting the effective input resistance. So as the rms of the line voltage increases, the input resistance is increased to lower the rms of the line current and keep the average power draw constant.

Simultaneously modeling both these effects, resistive impedance at line frequencies and constant rms power draw, is difficult. That was the downfall of the SPICE approach.

"With Maple we do not need to create a complex model that simultaneously embodies both these characteristics. Rather, we can handle them one at a time," says Joe Riel. "We can first model the modules as arbitrary valued resistors to determine the line currents. We can then apply the constant power draw condition to determine the actual values of the resistors. The power factor correction circuitry runs at several kilohertz. You don't need to worry about that so much for a functional model, but you still need to model its performance. At 60Hz it looks like a resistance, but in SPICE you cannot model it as a resistor because it has to vary as the nominal line voltage changes. To model the power factor correction, you have to make the input look like a resistor, but you have to change the resistor rms values," adds Riel.

Riel continues, "To do that in SPICE is tricky because you have two separate frequencies the 60Hz supply and the low frequency response of the power factor correction circuit to the average line over a number of cycles."

Maple was all Joe Riel and his team used for the analysis after giving up on SPICE. In the laboratory they used a variety of instruments: digital storage oscilloscope with current and voltage probes, Behlman three-phase AC source. Maple's symbolic computation facilities allow electrical engineers to express equations in terms of variable names for components like capacitors and resistors without having to provide specific numerical values for these components, which would normally be required when running under a numerical computation engine.

The results of computation under Maple are returned in terms of variable names and their inter-relationships, rather than as a number. In this case, the three-phase source is modeled as voltage phasors and a list of voltage phasors for the three line voltages is assigned.

Joe Riel designed his own SPICE-syntax equivalent in Maple, and called it Syrup, allowing him to input a SPICE-like deck describing the circuit and using Syrup to solve the circuit equations.

"Syrup is similar to SPICE, but more general in that you can put in symbolic parameters and numerical parameters as component values. There are no transistor models," Joe Riel elucidates.

"Syrup is part of the Maple Share Library. I wrote Syrup because entering a circuit as a SPICE deck is convenient. Otherwise you need to enter them as loop equations in Maple, so if you want to change something, you have to re-enter another equation".

By assigning a list of the power drawn by each line and equating the line power with the power dissipation in each resistor, from experimentation both in the laboratory and with Maple, Joe Riel determined that the two lines with m modules always draw the same current and hence have the same resistance. Equating these two resistances allowed him to eliminate an equation and simplify the result.

The configuration that latched-up had four modules, the total input power draw was 2700W and the line voltage was 240V. Computing expressions for the rms current on lines 1 and 2, with 10 ohms in the neutral line Joe Riel measured 6.5A on the line that fed two modules and 2.6A on each of the lines that fed a single module. The second pair of currents closely matches the experimental data. With a neutral resistance of 20 ohms the modules latched up.

"Plugging in that value in Maple gives no real solutions. That indicates that there is no stable operating point under the given conditions. So the latch-up is not surprising," explains Joe Riel.

"My involvement in the project took over a year," summarizes Joe Riel." More pertinent would be the time required for this particular task, that is, verifying the proper operation of the system under fault conditions in the neutral line. We had allocated about two days for the task. But that was just for determining (measuring) the response. The observed behavior was a surprise, hence the follow up work to better understand it.

Concludes Riel, "The Maple analysis took about a day and gave us much better understanding and saved us several days of laboratory work."

Learn more about Maple for electrical engineers